Initial release

11 files changed, 370 insertions, 0 deletions

diff --git a/circuits/add_drop.cir b/circuits/add_drop.cir
new file mode 100644
index 0000000..bc0ee01
--- /dev/null
+++ b/circuits/add_drop.cir
@@ -0,0 +1,41 @@
+* An Add-drop filter
+
+* Circuit parameters
+.assign lambda0 = 1.55e-6
+.assign neff = 2.3
+.assign length_2pi = {lambda0}/{neff}
+.assign k = 0.85
+
+.subckt test p1 p2 length=100e-6 att=1 neff=2.2 ng=4.3
+wg1 p1 0 length={length} att={att} neff={neff} ng={ng}
+wg2 0 p2 length={length} att={att} neff={neff} ng={ng}
+.ends
+
+* Circuit definition
+cwsrc1 in_ wl=1.55e-6 power=1
+x1 in_ in test length=1e-3 neff=1 ng=4 att=0
+;wg_access in_ in length={length_2pi} neff={neff} ng=4
+
+coupler1 in ring_bl out ring_br k={k}
+coupler2 add ring_tr drop ring_tl k={k}
+
+wg_ring_l ring_tl ring_bl att=2 length=101*{length_2pi} neff={neff} ng=4.3
+wg_ring_r ring_br ring_tr att=2 length=101*{length_2pi} neff={neff} ng=4.3
+
+* Simulator options
+.options abstol=1e-12 reltol=1e-6 timescale=-15
+
+* DC analysis (CW sweep) parameters
+.assign lambda_min = {lambda0} - 15e-9
+.assign lambda_max = 2*{lambda0}-{lambda_min}
+.assign dlambda = 1*1e-9
+
+* Analysis
+;.dc WL(cwsrc1) {lambda_min} {lambda_max} {dlambda} P(cwsrc1) 0 1 0.01
+.dc /cwsrc1/WL {lambda_min} {lambda_max} {dlambda}
+;.dc P(cwsrc1) 0 1 0.1
+;.dc FREQ(cwsrc1) 192e12 194e12 1e9
+;.dc WL(cwsrc1)
+;.op
+;.tran
+;.dc wl(osrc1)=[{lambda_min},{lambda_max},{npoints}]
diff --git a/circuits/add_drop_pyspecs.cir b/circuits/add_drop_pyspecs.cir
new file mode 100644
index 0000000..cc724d4
--- /dev/null
+++ b/circuits/add_drop_pyspecs.cir
@@ -0,0 +1,28 @@
+* An Add-drop filter
+
+* Circuit parameters
+.assign lambda0 = 1.55e-6
+
+* Circuit definition
+;cwsrc1 in wl=1.55e-6 power=1
+vlsrc1 in values=[[0.5e-9,1,{lambda0}],[2e-9,0,{lambda0}]]
+
+coupler1 in 1 out 2 k=0.15
+coupler2 add 3 drop 4 k=0.15
+
+wg_ring_l 4 1 length=300e-6 neff=3.999
+wg_ring_r 2 3 length=300e-6 neff=3.999
+
+probe1 out
+probe2 drop
+probe3 in
+
+* Simulator options
+.options abstol=1e-6 reltol=1e-8 timescale=-12 traceall=1
+
+* Analysis parameter
+.assign dlambda = 1e-12
+
+* Analysis
+;.dc /cwsrc1/WL 1549.9e-9 1550.1e-9 {dlambda}
+.tran 3e-9
diff --git a/circuits/add_drop_sub.cir b/circuits/add_drop_sub.cir
new file mode 100644
index 0000000..1d96aed
--- /dev/null
+++ b/circuits/add_drop_sub.cir
@@ -0,0 +1,15 @@
+* An Add-drop filter subcircuit
+
+.subckt add_drop_filter in drop out add radius_ring=50e-6 k1=0.85 k2=0.85 att_wg=2 neff_wg=2.2 ng_wg=4.3
+
+* Circuit parameters
+.assign length_wg = {pi}*{radius_ring}
+
+* Circuit definition
+coupler1 in ring_bl out ring_br k={k1}
+coupler2 add ring_tr drop ring_tl k={k2}
+
+wg_ring_l ring_tl ring_bl att={att_wg} length={length_wg} neff={neff_wg} ng={ng_wg}
+wg_ring_r ring_br ring_tr att={att_wg} length={length_wg} neff={neff_wg} ng={ng_wg}
+
+.ends
diff --git a/circuits/common_definitions.def b/circuits/common_definitions.def
new file mode 100644
index 0000000..9c25105
--- /dev/null
+++ b/circuits/common_definitions.def
@@ -0,0 +1,5 @@
+.assign lambda0 = 1.55e-6 ; m
+.assign neff = 2.3
+.assign ng = 4.3
+.assign att_wg = 2 ; db/cm
+.assign length_2pi = {lambda0}/{neff}
diff --git a/circuits/double_ring.cir b/circuits/double_ring.cir
new file mode 100644
index 0000000..0e4addb
--- /dev/null
+++ b/circuits/double_ring.cir
@@ -0,0 +1,57 @@
+* Show bitstream source 
+
+* Initialize the sources
+one 0
+clk 1 100p
+
+*bsrc 0 1 2 {0, 0, 0}
+bsrc 0 1 2 {0, 252, 15, 0} 1550.0e-9
+*bsrc 0 1 2 {0, 252, 15, 0} 1545.0e-9
+
+* split
+dc 2 3 4 5
+dc 6 7 8 9
+dc 12 13 10 11
+dc 16 17 14 15
+
+wg 10 3 350.85477427u
+*wg 5 18 350.85477427u
+wg 5 12 350.85477427u
+
+* resonance at 1545
+*wg 14 7 351.08113608611u
+*wg 9 16 351.08113608611u
+* resonance at 1550
+wg 14 7 350.85477427u
+wg 9 16 350.85477427u
+
+wg 4 6 701.12011675u
+wg 15 13 701.12011675u
+
+
+* feed into detector
+* Input
+pdet 2 35 24
+
+* Inside ring1
+pdet 12 36 23
+
+* Through 1 port
+*pdet 4 37 25
+
+* Through 2 port
+pdet 8 38 26
+
+* Drop port
+pdet 11 39 27
+
+* Inside ring2
+pdet 13 40 28
+
+*tracefile "traces/double_ring"
+*tracenet 20 "SIG_IN"
+*tracenet 2 "SIG_IN_1"
+*tracenet 4 "SIG_ADD_1"
+*tracenet 11 "SIG_DROP_1"
+*tracenet 8 "SIG_ADD_2"
+*tracenet 15 "SIG_DROP_2"
diff --git a/circuits/paul_3ring_puf.cir b/circuits/paul_3ring_puf.cir
new file mode 100644
index 0000000..0854975
--- /dev/null
+++ b/circuits/paul_3ring_puf.cir
@@ -0,0 +1,58 @@
+* Paul 3 ring PUF
+
+.assign wl0=1.55e-6
+.assign neff=2.44 ng=4.3 att=3
+.assign R=10e-6 dR=10e-9 k=0.22360679774997896
+.assign L_r2r=3e-6 L_access=0e-6
+.assign R1={R} R2=({R}+{dR}) R3={R}+(2*{dR})
+.assign tau=1e-12
+.assign filename="inputstream.csv"
+.assign filename="inputstream_25wl.csv"
+.assign filename="paul_puf_bitstream_16bit_25wl.csv"
+.assign filename="paul_puf_bitstream_158b_3wl.csv"
+;.assign filename="paul_puf_bitstream_temp.csv"
+
+.include circuits/add_drop_sub.cir
+
+;CWSRC1 in wl={wl0} power=1
+VLSRC1 in values={filename}
+;VLSRC_bot in_top values={filename}
+;VLSRC_bot in_bot values={filename}
+;VLSRC_top in_top values=[[0,0,{wl0}],[{tau},1,],[2*{tau},0,],[3*{tau},1,],[4*{tau},0,]]
+;VLSRC_bot in_bot values=[[0,0,{wl0}],[{tau},1,],[2*{tau},0,],[3*{tau},1,],[4*{tau},0,]]
+
+SPLITTER1 in in_top in_bot
+MERGER1 drop_top_1 drop_bot_1 out_drop
+MLPROBE1 in [1.55e-6, 1.5599999999999999e-06, 1.57e-6]
+;PDETin in _ 1e-15
+PDET1 out_drop _ 1e-15
+PROBE1 out_drop
+
+WG1 in_top in_top_1 L={L_access} att={att} neff={neff} ng={ng}
+WG2 in_bot in_bot_1 L={L_access} att={att} neff={neff} ng={ng}
+
+WG3 through_bot_1 in_bot_2 L={L_r2r} att={att} neff={neff} ng={ng}
+WG4 through_bot_2 in_bot_3 L={L_r2r} att={att} neff={neff} ng={ng}
+WG5 through_top_2 in_top_3 L={L_r2r} att={att} neff={neff} ng={ng}
+WG6 through_top_1 in_top_2 L={L_r2r} att={att} neff={neff} ng={ng}
+
+XAD_top_1 in_top_1 drop_top_1 through_top_1 add_top_1 add_drop_filter radius_ring={R1} k1={k} k2={k} neff_wg={neff} ng_wg={ng} att_wg={att}
+XAD_top_2 in_top_2 drop_top_2 through_top_2 add_top_2 add_drop_filter radius_ring={R2} k1={k} k2={k} neff_wg={neff} ng_wg={ng} att_wg={att}
+XAD_top_3 in_top_3 drop_top_3 through_top_3 nothing add_drop_filter radius_ring={R3} k1={k} k2={k} neff_wg={neff} ng_wg={ng} att_wg={att}
+
+XAD_bot_1 in_bot_1 drop_bot_1 through_bot_1 add_bot_1 add_drop_filter radius_ring={R1} k1={k} k2={k} neff_wg={neff} ng_wg={ng} att_wg={att}
+XAD_bot_2 in_bot_2 drop_bot_2 through_bot_2 add_bot_2 add_drop_filter radius_ring={R2} k1={k} k2={k} neff_wg={neff} ng_wg={ng} att_wg={att}
+XAD_bot_3 in_bot_3 drop_bot_3 through_bot_3 nothing add_drop_filter radius_ring={R3} k1={k} k2={k} neff_wg={neff} ng_wg={ng} att_wg={att}
+
+WG13 drop_bot_3 add_bot_2 L={L_r2r} att={att} neff={neff} ng={ng}
+WG14 drop_bot_2 add_bot_1 L={L_r2r} att={att} neff={neff} ng={ng}
+WG16 drop_top_3 add_top_2 L={L_r2r} att={att} neff={neff} ng={ng}
+WG17 drop_top_2 add_top_1 L={L_r2r} att={att} neff={neff} ng={ng}
+
+WG18 through_top_3 out_top L={L_access} att={att} neff={neff} ng={ng}
+WG15 through_bot_3 out_bot L={L_access} att={att} neff={neff} ng={ng}
+
+.options abstol=1e-5 reltol=1e-4 traceall=0 timescale=-14 resolution=1
+.tran 8e-9
+;.dc WL(CWSRC1) 1.54e-6 1.56e-6 1e-11
+;.tran 300e-12
diff --git a/circuits/paul_simple_ring.cir b/circuits/paul_simple_ring.cir
new file mode 100644
index 0000000..a6e6b2f
--- /dev/null
+++ b/circuits/paul_simple_ring.cir
@@ -0,0 +1,28 @@
+* Show bitstream source 
+
+* Initialize the sources
+one 0
+clk 1 100p
+
+*bsrc 0 1 13 {0, 0, 0}
+bsrc 0 1 2 {0, 252, 15, 0, 0, 0}
+
+* split
+dc 2 3 4 5
+dc 12 13 10 11
+
+wg 10 3 350.85477427u
+wg 5 12 350.85477427u
+
+* feed into detector
+* Input
+pdet 2 35 24
+
+* Inside ring
+pdet 12 36 23
+
+* Through 1 port
+pdet 4 37 25
+
+* Drop port
+pdet 11 39 27
diff --git a/circuits/subckt_test.cir b/circuits/subckt_test.cir
new file mode 100644
index 0000000..fd3eec0
--- /dev/null
+++ b/circuits/subckt_test.cir
@@ -0,0 +1,10 @@
+.subckt AAA 1 2 len=3
+WG 1 2 length={len} neff=1 ng=1 att=0
+.ends
+
+cwsrc in pow=1 wl=1.55e-6
+X1 in out AAA
+;probe out type=power
+
+.op
+
diff --git a/circuits/subckt_tests.cir b/circuits/subckt_tests.cir
new file mode 100644
index 0000000..98f8e7b
--- /dev/null
+++ b/circuits/subckt_tests.cir
@@ -0,0 +1,51 @@
+* An Add-drop filter
+
+** Circuit parameters
+.assign lambda0 = 1.55e-6
+.assign neff = 2.3
+.assign length_2pi = {lambda0}/{neff}
+.assign k = 0.85
+
+** Include definition of add-drop subcircuit
+.include circuits/add_drop_sub.cir
+
+.subckt test p1 p2
+.assign L=3e-3
+
+.subckt test 1 p2 L={L}
+wg1 1 p2 length={L}
+.ends
+
+x1 p1 1 test
+x2 1 2 test L=0
+wg1 2 p2 L=1e-3
+
+.ends
+
+** Circuit definition
+vlsrc1 in values=[[1e-9,1,{lambda0}], [2e-9,2,], [3e-9, -2,], [4e-9, 0,]]
+
+;cwsrc1 in wl=1.55e-6 power=1
+
+x1 in drop out add add_drop_filter radius_ring={length_2pi}*109.5
+x2 out out_ test
+
+** Simulator options
+.options abstol=1e-12 reltol=1e-6 timescale=-15
+
+* DC analysis (CW sweep) parameters
+.assign lambda_min = {lambda0} - 15e-9
+.assign lambda_max = 2*{lambda0}-{lambda_min}
+.assign dlambda = 0.1*1e-9
+
+** Analysis
+;.dc WL(cwsrc1) {lambda_min} {lambda_max} {dlambda} P(cwsrc1) 0 1 0.01
+;.dc WL(cwsrc1) {lambda_min} {lambda_max} {dlambda}
+;.dc P(cwsrc1) 0 1 0.1
+;.dc FREQ(cwsrc1) 192e12 194e12 1e9
+;.dc WL(cwsrc1)
+;.op
+.tran
+;.dc wl(osrc1)=[{lambda_min},{lambda_max},{npoints}]
+
+
diff --git a/circuits/test_include.cir b/circuits/test_include.cir
new file mode 100644
index 0000000..d40e7de
--- /dev/null
+++ b/circuits/test_include.cir
@@ -0,0 +1 @@
+include circuits/double_ring.cir
diff --git a/circuits/triple_ring.cir b/circuits/triple_ring.cir
new file mode 100644
index 0000000..2642f34
--- /dev/null
+++ b/circuits/triple_ring.cir
@@ -0,0 +1,76 @@
+* Show bitstream source 
+
+* Initialize the sources
+one 0
+clk 1 100p
+
+*bsrc 0 1 2 {0, 0, 0}
+bsrc 0 1 2 {0, 252, 15, 0} 1550.0e-9
+*bsrc 0 1 2 {0, 252, 15, 0} 1545.0e-9
+
+* split
+dc 2 3 4 5
+dc 6 7 8 9
+
+dc 12 13 10 11
+dc 16 17 14 15
+
+dc 18 19 20 21
+dc 24 25 22 23
+
+* ring 1
+wg 10 3 350.85477427u
+wg 5 12 350.85477427u
+
+* ring 2
+* resonance at 1545
+*wg 14 7 351.08113608611u
+*wg 9 16 351.08113608611u
+* resonance at 1550
+wg 14 7 350.85477427u
+wg 9 16 350.85477427u
+
+* ring 1 to ring 2
+wg 4 6 701.12011675u
+wg 15 13 701.12011675u
+
+* ring 2 to ring 3
+wg 8 18 1701.12011675u
+wg 23 17 1701.12011675u
+
+* ring 3
+wg 22 19 350.85477427u
+wg 21 24 350.85477427u
+
+* feed into detector
+* Input
+pdet 2 100 200
+
+* Inside ring1
+pdet 5 101 201
+
+* Inside ring2
+pdet 9 102 202
+
+* Inside ring3
+pdet 21 103 203
+
+* Through 1 port
+*pdet 4 104 204
+
+* Through 2 port
+pdet 8 105 205
+
+* Through 3 port
+pdet 20 106 206
+
+* Drop port
+pdet 11 107 207
+
+*tracefile "traces/double_ring"
+*tracenet 20 "SIG_IN"
+*tracenet 2 "SIG_IN_1"
+*tracenet 4 "SIG_ADD_1"
+*tracenet 11 "SIG_DROP_1"
+*tracenet 8 "SIG_ADD_2"
+*tracenet 15 "SIG_DROP_2"